Semiconductor wafers are commonly used in the production of integrated circuit (IC) chips on which circuitry are printed. The circuitry is first printed in miniaturized form onto surfaces of the wafers. The wafers are then broken into circuit chips. This miniaturized circuitry requires that front and back surfaces of each wafer be extremely flat and parallel to ensure that the circuitry can be properly printed over the entire surface of the wafer. To accomplish this, grinding and polishing processes are commonly used to improve flatness and parallelism of the front and back surfaces of the wafer after the wafer is cut from an ingot. A particularly good finish is required when polishing the wafer in preparation for printing the miniaturized circuits on the wafer by an electron beam-lithographic or photolithographic process (hereinafter “lithography”). The wafer surface on which the miniaturized circuits are to be printed must be flat. Similarly, flatness and finish are also important for solar applications.
The construction and operation of conventional polishing machines contribute to the unacceptable flatness parameters. Polishing machines typically include a circular or annular polishing pad mounted on a turntable or platen for driven rotation about a vertical axis passing through the center of the pad and a mechanism for holding the wafer and forcing it into the polishing pad. The wafer is typically mounted to the polishing head using for example, liquid surface tension or a vacuum/suction. A polishing slurry, typically including chemical polishing agents and abrasive particles, is applied to the pad for greater polishing interaction between the polishing pad and the surface of the wafer. This type of polishing operation is typically referred to as chemical-mechanical polishing (CMP).
During operation, the pad is rotated and the wafer is brought into contact with and forced against the pad by the polishing head. As the pad wears, e.g., after a few hundred wafers, wafer flatness parameters degrade because the pad is no longer flat, but instead has a worn annular band forming a depression along the polishing surface of the pad. Such pad wear impacts wafer flatness, and may cause “dishing” or “doming” or a combination thereof resulting in a “w-shape”.
When the flatness of the wafers becomes unacceptable, the worn polishing pad has to be replaced with a new one. Frequent pad replacement adds significant costs to the operation of the polishing apparatus not only because of the number of pads that need to be purchased, stored, and disposed of, but also because of the substantial amount of down time required to change the polishing pad.
Accordingly, there is a need for a polishing apparatus that has the ability to optimize flatness parameters by modulating the wafer thickness shape in the polishing process for doming, dishing, and +/− w-shape.
This Background section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.